SORA Benchmark Suite
Reimplemented SORA and 14 named comparison methods in a unified PyTorch codebase, with visualization tools for comparing training and robustness behavior across architectures and datasets.
Non-Stationarity in Reinforcement Learning
Surveyed research on RL under evolving dynamics, including non-stationary MDPs, dynamic regret, and adaptation methods. Presented the synthesis through a research poster, slide presentation, and video, with a companion technical blog.
C-Minus Compiler
Implemented a compiler pipeline for C-Minus covering lexical analysis, parsing, semantic analysis, and code generation.
MIPS Processor Design and Implementation
Designed and implemented a MIPS processor architecture in Quartus, including registers, RAM/ROM memories, an ALU, and instruction support. Implemented single-cycle, multi-cycle, and pipelined structures and executed machine-code programs stored in ROM.